Virtually all aspects of modern life have been touched by integrated circuit semiconductor devices. From portable personal devices to industrial equipment, electronic devices improve processes and machines that we often take for granted.
The sometimes behind the scenes market for electronic devices increasingly demands more functions with faster response in reduced dimensions and at lower prices. These high performance devices often demand all of lighter, faster, smaller, multi-functional, highly reliable, and lower cost.
In efforts to meet such requirements, improvements have been attempted in many aspects of electronic product development such as producing smaller and less expensive semiconductor chips. Unfortunately, this development is still not enough to satisfy the demands.
A commonly used integrated circuit or semiconductor device methodology for packaging uses a substrate for the semiconductor chips. The substrate or “board” provides a connection pattern of input and output elements such as contacts, leads, or other electrodes. Typically, the chip is positioned on the substrate having an input/output electrode surface that is connected to an “active” surface of the chip.
In order to provide desired connection patterns, a substrate typically includes planar dielectrics, electrical contacts on the die-facing side of the substrate, conductive traces that extend laterally along the planar dielectrics, and contact pads, or “terminals,” that are exposed at an opposite surface of the substrate. A substrate may also include conductive vias extending through a portion of the substrate thickness for interconnectivity.
Numerous technologies have been developed to meet these requirements. Some research and development focused on new package technologies while others focused on improving existing and mature package technologies. Research and development in package technologies may include a seemingly endless number of different approaches.
One proven way to reduce cost is to use package technologies with existing manufacturing methods and equipments. Paradoxically, the reuse of existing manufacturing processes does not typically result in the reduction of package size. Existing packaging technologies struggle to cost effectively meet demands of today's integrated circuit packages.
Of course, the requirement of additional material including the substrate undesirably increases the thickness and cost of fabricating the package. Moreover, the use of an additional substrate material may undesirably increase the manufacturing cycle time, which can also increase cost.
Despite the advantages of recent developments in semiconductor fabrication and packaging techniques, there is a continuing need for improving electronic device size, performance, reliability, and manufacturing.
Thus, a need still remains for an integrated circuit package system with improved manufacturing processes and materials.
In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems.
Additionally, the need to save costs, improve efficiencies and performance, and meet competitive pressures, adds an even greater urgency to the critical necessity for finding answers to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.